Nios V product line.

RTL Design Engineering Intern
05/2023 to 04/2024 @Intel Corporation

FPGA Soft Processor

For my PEY co-op, I worked on micro-architectural logic design and verification of Nios V, Intel's RISC-V based embedded processor IP family for FPGAs. I optimized the instruction pipeline, redesigned the hardware for external debug support, and got to author numerous functional specifications. By the end, I improved area utilization by 20%, fmax by 20%, IPC by 5%, and debug latency by 6x.

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Nios V product line.
Clearpath Heron ASV in a lake. Clearpath Heron ASV in a lake.

Field Robotics Research Intern
05/2022 to 08/2022 @UTIAS Autonomous Space Robotics Lab

USV Stochastic Navigation

With a vision to automate environmental monitoring, I worked on a retrofitted Clearpath Heron unmanned surface vehicle. I generated satellite-informed water masks of numerous Canadian lakes using GISs, evaluated our navigation algorithm against baselines, and created a GUI using ROS and ReactJS to track the robot in real-time at field tests.

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Forcolab Group thumbnail.

Machine Learning Research Intern
05/2021 to 08/2021 @U of T Forcolab Group

Clustering Stack Overflow Posts

Kickstarting the discovery of how collaborating on stackoverflow.com can be a means to organize knowledge, I optimized parameters for hierarchical density-based clustering of Stack Overflow posts. I increased precision by 11.1% and presented my work at the U of T UnERD conference.

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Forcolab Group thumbnail.